1. Field of the Invention
The present invention relates to a semiconductor package, and more particularly, to a low thermal stress semiconductor package which has a chip disposed on and spaced from a substrate.
2. Description of the Related Art
The semiconductor package has four major functions, i.e. signal distribution, power distribution, heat dissipation, and protection. In general, the semiconductor chip is formed into an enclosure, such as a single-chip module (SCM) or a chip carrier, referred to as the packaging of the semiconductor. These packaged chips, along with other components such as capacitors, resistors, inductors, filters, switches, and optical and RF components, are assembled to a printed wiring board.
As the need has arisen for lighter and more complex electronic devices, the semiconductor chip has to be manufactured for having more leads or contacts for inputting and outputting signals. For example, in a conventional plastic ball gray array (PBGA) package 10 shown in FIG. 1, a semiconductor chip 12 adheres to a substrate 14 by means of an adhesive layer 16. Bonding wires 18 are used to electrically connect the semiconductor chip 12 to the substrate 14 and an encapsulant 20 encapsulates the semiconductor chip 12 and the bonding wires 18. A plurality of solder balls 22 are disposed on the bottom surface of the substrate 14 for being attached to an external circuit board.
However, the mismatch of the coefficients of thermal expansion (CTE) of the components in the package 10 leads the package 10 to warpage or stress. In addition, the mismatch of the coefficients of thermal expansion (CTE) further leads the chip 12 in the encapsulant 20 to damage.
Accordingly, there exists a need for a semiconductor package to overcome the above-mentioned drawbacks.